Implementation Analysis of adaptive Viterbi Decoder for High Speed Applications

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

High Data Rate Pipelined Adaptive Viterbi Decoder Implementation

This paper presents a pipelined Adaptive Viterbi algorithm of rate 1⁄2 convolutional coding with a constraint length K = 3 which is designed in a reconfigurable hardware to take full advantage of algorithm parallelism, specialization and the throughput rate. In present work, the hardware implementation of the pipelined Adaptive Viterbi algorithm is performed using FPGA processor (Spartan-3AN st...

متن کامل

Hardware Implementation of Viterbi Decoder for Wireless Applications

In 2G mobile terminals, the VD consumes approximately one third of the power consumption of a baseband mobile transceiver. Thus, in 3G mobile systems, it is essential to reduce the power consumption of the VD. In this report the register exchange (RE) method, adopting a pointer concept, is used to implement the survivor memory unit (SMU) of the VD. For the implementation part, hardware implemen...

متن کامل

A Novel High-Speed Configurable Viterbi Decoder for Broadband Access

A novel design and implementation of an online reconfigurable Viterbi decoder is proposed, based on an area-efficient addcompare-select (ACS) architecture, in which the constraint length and traceback depth can be dynamically reconfigured. A designspace exploration to trade off decoding capability, area, and decoding speed has been performed, from which the maximum level of pipelining against t...

متن کامل

High Speed ACSU Architecture for Viterbi Decoder Using T-Algorithm

In this paper, we propose an efficient architecture based on pre-computation for Viterbi decoders incorporating Talgorithm. Through optimization at both algorithm level and architecture level, the new architecture greatly shortens the long critical path introduced by the conventional T-algorithm. The design example provided in this work demonstrates more than twice improvement in clock speed wi...

متن کامل

CMOS Implementation of Viterbi Decoder

This paper presents implementation of a soft decision Viterbi decoder suitable for convolution codes with short constraint lengths. The decoder is based on a property of Viterbi algorithm that states “if the survivor paths from all possible states at time n are traced back then with high probability all the paths merge at time n-L where L is the survivor path length”. Pipeline structures are in...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: International Journal of Computer Applications

سال: 2011

ISSN: 0975-8887

DOI: 10.5120/3797-5232